(module SOIC-8-1EP_3.9x4.9mm_Pitch1.27mm (layer F.Cu) (tedit 59C023A3)
  (descr "8-Lead Thermally Enhanced Plastic Small Outline (SE) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
  (tags "SOIC 1.27")
  (attr smd)
  (fp_text reference REF** (at 0 -3.5) (layer F.SilkS)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (fp_text value SOIC-8-1EP_3.9x4.9mm_Pitch1.27mm (at 0 3.5) (layer F.Fab)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (fp_text user %R (at 0 0) (layer F.Fab)
    (effects (font (size 0.9 0.9) (thickness 0.135)))
  )
  (fp_line (start -0.95 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.15))
  (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.15))
  (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.15))
  (fp_line (start -1.95 2.45) (end -1.95 -1.45) (layer F.Fab) (width 0.15))
  (fp_line (start -1.95 -1.45) (end -0.95 -2.45) (layer F.Fab) (width 0.15))
  (fp_line (start -3.75 -2.75) (end -3.75 2.75) (layer F.CrtYd) (width 0.05))
  (fp_line (start 3.75 -2.75) (end 3.75 2.75) (layer F.CrtYd) (width 0.05))
  (fp_line (start -3.75 -2.75) (end 3.75 -2.75) (layer F.CrtYd) (width 0.05))
  (fp_line (start -3.75 2.75) (end 3.75 2.75) (layer F.CrtYd) (width 0.05))
  (fp_line (start -2.075 -2.575) (end -2.075 -2.525) (layer F.SilkS) (width 0.15))
  (fp_line (start 2.075 -2.575) (end 2.075 -2.43) (layer F.SilkS) (width 0.15))
  (fp_line (start 2.075 2.575) (end 2.075 2.43) (layer F.SilkS) (width 0.15))
  (fp_line (start -2.075 2.575) (end -2.075 2.43) (layer F.SilkS) (width 0.15))
  (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer F.SilkS) (width 0.15))
  (fp_line (start -2.075 2.575) (end 2.075 2.575) (layer F.SilkS) (width 0.15))
  (fp_line (start -2.075 -2.525) (end -3.475 -2.525) (layer F.SilkS) (width 0.15))
  (pad 9 thru_hole rect (at 0.5875 -1.175) (size 1.175 1.175) (drill 0.6) (layers *.Cu F.Mask)
    (solder_paste_margin_ratio -0.2))
  (pad 9 thru_hole rect (at -0.5875 -1.175) (size 1.175 1.175) (drill 0.6) (layers *.Cu F.Mask)
    (solder_paste_margin_ratio -0.2))
  (pad 1 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask))
  (pad 2 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask))
  (pad 3 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask))
  (pad 4 smd rect (at -2.7 1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask))
  (pad 5 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask))
  (pad 6 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask))
  (pad 7 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask))
  (pad 8 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask))
  (pad 9 thru_hole rect (at 0.5875 1.175) (size 1.175 1.175) (drill 0.6) (layers *.Cu F.Mask)
    (solder_paste_margin_ratio -0.2))
  (pad 9 thru_hole rect (at 0.5875 0) (size 1.175 1.175) (drill 0.6) (layers *.Cu F.Mask)
    (solder_paste_margin_ratio -0.2))
  (pad 9 thru_hole rect (at -0.5875 1.175) (size 1.175 1.175) (drill 0.6) (layers *.Cu F.Mask)
    (solder_paste_margin_ratio -0.2))
  (pad 9 thru_hole rect (at -0.5875 0) (size 1.175 1.175) (drill 0.6) (layers *.Cu F.Mask)
    (solder_paste_margin_ratio -0.2))
  (model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-8-1EP_3.9x4.9mm_Pitch1.27mm.wrl
    (at (xyz 0 0 0))
    (scale (xyz 1 1 1))
    (rotate (xyz 0 0 0))
  )
)